TernaryCore

A distilled ternary summarizer on a $299 Digilent Arty A7-100T. All twenty-eight transformer blocks run on the FPGA, reading 73.4 MB of {−1, 0, +1} weights out of the board's own DDR3. The host tokenizes, looks up the embedding, and turns the last hidden state back into logits — nothing else.

The resident checkpoint is the DialogSum summarizer; this tab scores sentiment from its logit gap (a leftover of the SST-2 student), so binary sentiment is the job it was trained for and this is it doing that job. One forward pass per token of the input; the answer is the gap between two entries of the logit vector.

 

Roughly 2.0 s a token at the start of a context and 2.9 s at 512, because attention walks the KV cache and the rest of a block does not. The board's arithmetic is about two per cent of that; the rest is a soft CPU doing elementwise work and handing the array bytes one 32-bit register write at a time. That is the finding, not the speed.
The generate tab is the show: paste a short dialogue ending in "Summary:" and the board writes the summary, then stops on its own. The board matches a float64 reference token for token.
github.com/Ternarycore/ternarycore · CERN-OHL-S v2